Road to 100G: Facing the Challenges of Developing 100 Gbps Platforms

This paper will address the challenges of scaling packet networks from the current state-of-the-art, 10 Gbps limited packet-aware, to next generation 100 Gbps all packet-aware, any-to-any networks. The areas covered will include optical/electrical interfaces, interface adaptation, data plane processing, control plane processing, as well as switching, system power and printed circuit board requirements. These challenges apply to platforms that aggregate lower speed interfaces, up to 100 Gbps, as well as platforms with pure 100 Gbps interfaces.